The present invention relates to a graphic data processor formed on a semiconductor chip and, more particularly, to a technique effective when applied to fields requiring graphic data processing of, for example, a car information system, a set-top box, a digital TV, a mobile communication system, a digital sound terminal, a media terminal, a portable terminal, and the like.
Japanese Unexamined Patent Publication No. 2003-208631 (FIG. 32) describes a graphic processor for performing a three-dimensional graphics process. Japanese Unexamined Patent Publication No. Hei 6(1994)-28486 (FIG. 1) discloses a graphic processor having a thick line drawing function.
The inventors herein have examined optimization of transfer of control information and data for drawing and display control in a graphic data processor. A graphic data processor examined by the inventors prior to the present invention has therein a pixel bus and an I/O bus, and a central processing unit (also simply described as CPU) accesses an external data memory via a CPU interface and the pixel bus. To the CPU interface, a bus bridge circuit is connected. The bus bridge circuit has the role of a bridge of distributing data from the CPU to peripheral modules and transmitting data from the peripheral modules to the CPU. The bus bridge circuit has therein a direct memory access controller (DMAC) and can write data from the peripheral modules to the data memory via the pixel bus and transfer data in the data memory to the peripheral modules without using the CPU. Modules connected to the pixel bus, specifically, a graphic module, a CPU interface, and a bus bridge circuit can transfer data to/from the data memory. On the pixel bus, transfer among the modules is not supported.